Please use this identifier to cite or link to this item: http://hdl.handle.net/11718/1749
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dc.contributor.authorChandra, Pankaj-
dc.contributor.authorGupta, Sudheer-
dc.date.accessioned2010-03-28T12:54:41Z-
dc.date.available2010-03-28T12:54:41Z-
dc.date.copyright1996-04-
dc.date.issued2010-03-28T12:54:41Z-
dc.identifier.urihttp://hdl.handle.net/11718/1749-
dc.description.abstractIn this paper we study a semiconductor packaging line at IBM Bromont. At the line, modules are assembled and then tested in a Burn-in oven. The Burn-in oven is a batch processing station. We outline a procedure to determine order release scheduled and lot sizes for the various work stations in the line, such that total manufacturing lead time is minimized. The internal parameters of the procedure are set by simulation experiments and by heuristics. Sensitivity analysis is carried out to determine the robustness of the procedure with respect to various external parameter settings.en
dc.language.isoenen
dc.relation.ispartofseriesWP;1996/1302-
dc.subjectBatch Processorsen
dc.subjectLead timeen
dc.subjectsemiconductor packaging lineen
dc.subjectbatch processorsen
dc.subjectHeuristicsen
dc.titleManaging batch processors to reduce lead time in a semiconductor packaging lineen
dc.typeWorking Paperen
Appears in Collections:Working Papers

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