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dc.contributor.authorChandra, Pankaj
dc.contributor.authorGupta, S.
dc.date.accessioned2010-10-08T11:34:42Z
dc.date.available2010-10-08T11:34:42Z
dc.date.copyright1997
dc.date.issued1997-10-08T11:34:42Z
dc.identifier.urihttp://hdl.handle.net/11718/9474
dc.descriptionInternational Journal of Production Research, Vol. 35, No. 3, (1997), pp. 611-633en
dc.description.abstractIn this paper we study a semiconductor packaging line at IBM Bromont. At the line, modules are assembled and then tested in a burn-in oven. The burn-in oven is a batch processing station. We outline a procedure to determine order release schedule and lot sizes for the various work stations in the line, such that total manufacturing lead time is minimized. The internal parameters of the procedure are set by simulation experiments and by heuristics. Sensitivity analysis is carried out to determine the robustness of the procedure with respect to various external parameter settings.
dc.language.isoenen
dc.subjectSemiconductoren
dc.subjectLead Timeen
dc.titleManaging batch processors to reduce lead time in a semiconductor packaging lineen
dc.typeArticleen


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